AMD—Design Verification Engineer

Job description

Description: ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career. THE ROLE: The Infinity Fabric transport layer verification team is looking for an experienced pre-silicon verification engineer to help verify our configurable switches and die-to-die interconnect. Infinity Fabric is part of every new AMD product being developed across Client, Server, Graphics, and Semi-Custom markets. Our growing team needs additional senior engineering experience to help us enhance our configurable testbench and to mentor junior engineers.   THE PERSON:  The preferred candidate will have proven experience verifying complex design blocks at the IP or SoC level using System Verilog/UVM or related technologies. He or she should be comfortable creating and executing on test plans in collaboration with design and verification colleagues in a metric-focused environment.   KEY RESPONSIBILITIES:  - Develop and enhance System Verilog / UVM-based testbenches to verify new features for client, server, graphics, and semi-custom interconnects. - Interact with architects, RTL designers, performance engineers, and post-silicon validation engineers to develop deep expertise in the Infinity Fabric architecture. - Understand TestBench Architecture and develop expertise in TestBench Verification Components. - Mentor junior engineers. PREFERRED EXPERIENCE:  - Proficient in IP level ASIC verification - Architected and developed complex verification environments and infrastructure, including scripting using Perl, Ruby, Make, or similar. - Exposure to RTL design, software development, formal verification, or other related domains. - Experience in UVM TestBench Development for complex designs preferred. - Industry experience is preferred. ACADEMIC CREDENTIALS:  - Bachelor’s or master’s degree in Electronics or Electrical or Computer engineering - #LI-BM2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy. Responsibilities: THE ROLE: The Infinity Fabric transport layer verification team is looking for an experienced pre-silicon verification engineer to help verify our configurable switches and die-to-die interconnect. Infinity Fabric is part of every new AMD product being developed across Client, Server, Graphics, and Semi-Custom markets. Our growing team needs additional senior engineering experience to help us enhance our configurable testbench and to mentor junior engineers.   THE PERSON:  The preferred candidate will have proven experience verifying complex design blocks at the IP or SoC level using System Verilog/UVM or related technologies. He or she should be comfortable creating and executing on test plans in collaboration with design and verification colleagues in a metric-focused environment.   KEY RESPONSIBILITIES:  - Develop and enhance System Verilog / UVM-based testbenches to verify new features for client, server, graphics, and semi-custom interconnects. - Interact with architects, RTL designers, performance engineers, and post-silicon validation engineers to develop deep expertise in the Infinity Fabric architecture. - Understand TestBench Architecture and develop expertise in TestBench Verification Components. - Mentor junior engineers. PREFERRED EXPERIENCE:  - Proficient in IP level ASIC verification - Architected and developed complex verification environments and infrastructure, including scripting using Perl, Ruby, Make, or similar. - Exposure to RTL design, software development, formal verification, or other related domains. - Experience in UVM TestBench Development for complex designs preferred. - Industry experience is preferred. ACADEMIC CREDENTIALS:  - Bachelor’s or master’s degree in Electronics or Electrical or Computer engineering - #LI-BM2