AMD—DFT Pattern

Job description

Description: ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career. MTS Pattern THE ROLE: · As a member of the S3 SoC Pattern Team, the successful candidate will own/lead the Pattern verification activities on complex SOC. These SOCs are among the biggest in the market with billions of transistors, consisting of AMD's high performance X86 cores, graphics, data fabric and many IPs such as USB, PCIE · Strong self-driving ability, should have excellent communication skills (both written and oral) · Strong problem-solving skills PREFERRED EXPERIENCE: · Candidate is responsible for verifying and delivering patterns to Product Engineering team for silicon validation. · Candidate is responsible for taking the test sequence from IP and porting it to SOC, running and verifying it at SOC, debug any fails/issues seen and deliver the passing patterns to Product Engineering · Must have good knowledge on the verification flows and tools such as VCS, Verdi · Must have hands in experience with AMBA, HSIO, IEEE 1149.1, IEEE 1678, IEEE 1500 protocols · Excellent hands-on debug skills and problem-solving attitude. · Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC · Experience of working on Functional Verification, SoC Verification, Emulation · Good in programming, System Verilog, PLI/DPI interface, C/C++, PERL/Shell script, assembly language · Must have good communication skills and the ability to work in a team environment. · Preferably having experience in architecture such as x86 or ARM domain based SOCs · Experience with CReST, PCIE, DDR is desired but not essential. · This position requires minimum of 10 to 15 years of experience   ACADEMIC CREDENTIALS:  - Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-RR1 #LI-Hybrid Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy. Responsibilities: MTS Pattern THE ROLE: · As a member of the S3 SoC Pattern Team, the successful candidate will own/lead the Pattern verification activities on complex SOC. These SOCs are among the biggest in the market with billions of transistors, consisting of AMD's high performance X86 cores, graphics, data fabric and many IPs such as USB, PCIE · Strong self-driving ability, should have excellent communication skills (both written and oral) · Strong problem-solving skills PREFERRED EXPERIENCE: · Candidate is responsible for verifying and delivering patterns to Product Engineering team for silicon validation. · Candidate is responsible for taking the test sequence from IP and porting it to SOC, running and verifying it at SOC, debug any fails/issues seen and deliver the passing patterns to Product Engineering · Must have good knowledge on the verification flows and tools such as VCS, Verdi · Must have hands in experience with AMBA, HSIO, IEEE 1149.1, IEEE 1678, IEEE 1500 protocols · Excellent hands-on debug skills and problem-solving attitude. · Experience of working in complex test-bench/model in Verilog, System Verilog or SystemC · Experience of working on Functional Verification, SoC Verification, Emulation · Good in programming, System Verilog, PLI/DPI interface, C/C++, PERL/Shell script, assembly language · Must have good communication skills and the ability to work in a team environment. · Preferably having experience in architecture such as x86 or ARM domain based SOCs · Experience with CReST, PCIE, DDR is desired but not essential. · This position requires minimum of 10 to 15 years of experience   ACADEMIC CREDENTIALS:  - Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-RR1 #LI-Hybrid