AMD—Synthesis CAD Engineer

Job description

Description: ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career. SENIOR SILICON DESIGN ENGINEER THE ROLE We are looking for a highly motivated Silicon Design Engineer to drive the automation, development, and deployment of advanced Front-End implementation methodologies across AMD's next-generation products. The candidate will play a key role in enhancing Synthesis, Place & Route, Logic Equivalence Checking, and Functional ECO flows targeting leading-edge technology nodes. This position offers an opportunity to work closely with global design teams and EDA vendors to build scalable, efficient, and robust CAD methodologies that enable the successful delivery of AMD CPUs, GPUs, and adaptive compute solutions. KEY RESPONSIBILITIES - Develop, enhance, and automate Synthesis, Place & Route, Logic Equivalence Checking (LEC), and Functional ECO methodologies for advanced-node designs. - Own and support next-generation synthesis and implementation flows with a focus on scalability, runtime efficiency, and quality of results. - Create utilities and automation frameworks using scripting languages to streamline implementation and verification workflows. - Collaborate with EDA vendors to identify innovative solutions, resolve methodology and tool issues, and improve flow capabilities. - Support design teams across global sites in achieving Front-End implementation targets and resolving flow-related issues. - Drive continuous improvements in CAD infrastructure, methodology robustness, and automation efficiency. - Work closely with cross-functional teams across geographically distributed development organizations. REQUIRED TECHNICAL SKILLS EDA Tool Expertise Hands-on experience with one or more industry-standard tools: - Cadence Innovus - Cadence Genus - Synopsys Design Compiler (DC) - Synopsys Fusion Compiler (FC) - Formality (FM) - VC Low Power (VCLP) - Synopsys ICC2 - Cadence Conformal Domain Expertise - Strong experience in Front-End Synthesis flows. - Hands-on experience in Logic Equivalence Checking (LEC) and Formal Verification methodologies. - Experience with Conformal ECO and Functional ECO flows. - Knowledge of CAD methodology development and automation. Preferred Skills - Experience in one or more of the following domains: - Physical Design (PnR) - Static Timing Analysis (STA) - Formal Verification - RTL Design and Coding - Strong automation mindset with a focus on scalable engineering solutions. EDUCATION & EXPERIENCE - Master's degree in Electronics Engineering, VLSI, Computer Engineering, or a related field. - 5–9 years of experience in CAD flow development, methodology development, and design automation at advanced technology nodes. - Strong programming and scripting proficiency in Python, Tcl, Perl, Shell, sed/awk, or similar languages. - Excellent analytical and problem-solving skills. - Strong communication and collaboration skills with the ability to work effectively in a global environment. - Demonstrated ownership, initiative, and a strong team-oriented work ethic. PREFERRED BACKGROUND Candidates with prior experience in CAD methodology development, design automation, Front-End implementation, Formal Verification, or ECO methodology development for advanced-node semiconductor designs will be highly preferred. #LI-BM2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy. Responsibilities: SENIOR SILICON DESIGN ENGINEER THE ROLE We are looking for a highly motivated Silicon Design Engineer to drive the automation, development, and deployment of advanced Front-End implementation methodologies across AMD's next-generation products. The candidate will play a key role in enhancing Synthesis, Place & Route, Logic Equivalence Checking, and Functional ECO flows targeting leading-edge technology nodes. This position offers an opportunity to work closely with global design teams and EDA vendors to build scalable, efficient, and robust CAD methodologies that enable the successful delivery of AMD CPUs, GPUs, and adaptive compute solutions. KEY RESPONSIBILITIES - Develop, enhance, and automate Synthesis, Place & Route, Logic Equivalence Checking (LEC), and Functional ECO methodologies for advanced-node designs. - Own and support next-generation synthesis and implementation flows with a focus on scalability, runtime efficiency, and quality of results. - Create utilities and automation frameworks using scripting languages to streamline implementation and verification workflows. - Collaborate with EDA vendors to identify innovative solutions, resolve methodology and tool issues, and improve flow capabilities. - Support design teams across global sites in achieving Front-End implementation targets and resolving flow-related issues. - Drive continuous improvements in CAD infrastructure, methodology robustness, and automation efficiency. - Work closely with cross-functional teams across geographically distributed development organizations. REQUIRED TECHNICAL SKILLS EDA Tool Expertise Hands-on experience with one or more industry-standard tools: - Cadence Innovus - Cadence Genus - Synopsys Design Compiler (DC) - Synopsys Fusion Compiler (FC) - Formality (FM) - VC Low Power (VCLP) - Synopsys ICC2 - Cadence Conformal Domain Expertise - Strong experience in Front-End Synthesis flows. - Hands-on experience in Logic Equivalence Checking (LEC) and Formal Verification methodologies. - Experience with Conformal ECO and Functional ECO flows. - Knowledge of CAD methodology development and automation. Preferred Skills - Experience in one or more of the following domains: - Physical Design (PnR) - Static Timing Analysis (STA) - Formal Verification - RTL Design and Coding - Strong automation mindset with a focus on scalable engineering solutions. EDUCATION & EXPERIENCE - Master's degree in Electronics Engineering, VLSI, Computer Engineering, or a related field. - 5–9 years of experience in CAD flow development, methodology development, and design automation at advanced technology nodes. - Strong programming and scripting proficiency in Python, Tcl, Perl, Shell, sed/awk, or similar languages. - Excellent analytical and problem-solving skills. - Strong communication and collaboration skills with the ability to work effectively in a global environment. - Demonstrated ownership, initiative, and a strong team-oriented work ethic. PREFERRED BACKGROUND Candidates with prior experience in CAD methodology development, design automation, Front-End implementation, Formal Verification, or ECO methodology development for advanced-node semiconductor designs will be highly preferred. #LI-BM2