Qualcomm—SerDes PHY Analog Design Engineer

Job description

Description: Company: Qualcomm India Private Limited Job Area: Engineering Group, Engineering Group > Hardware Engineering General Summary: As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products. Qualcomm Hardware Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements. Minimum Qualifications: • Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience. Role Overview BDC SerDes Mixed-Signal Design team is looking for experienced analog circuit designers with 4–12+ years of experience to work on high-speed SerDes PHYs. The role involves delivering next-generation PHY designs for SoCs and contributing to architecture analysis and circuit implementation in leading-edge FinFET and advanced technology nodes. The team focuses on low-power, high-performance analog designs for Qualcomm’s wireless and compute products. Key Responsibilities -Own hands-on analog circuit design for high-speed SerDes PHY blocks, High-speed TX/RX, Equalizers, Samplers, Phase interpolators, Serializer/De-serializer, Biases, and reference circuits, LDO etc. -Design analog and/or digital PLLs for frequency synthesis and SerDes applications, including charge pumps, loop filters, VCO/DCO, PFD/TDC, and high-speed dividers. -Take designs from schematic through post-layout verification, integration sign-off, and post-silicon bring-up. -Collaborate closely with RTL, digital design, physical design, design verification, and SoC verification teams to integrate and validate the PHY. Required Qualifications -4–12+ years of experience in analog or mixed-signal circuit design. -Strong understanding of advanced FinFET process effects on analog design and layout. -Experience with SPICE simulators, ADE XL, and Virtuoso. -Hands-on experience with post-silicon bring-up and debug. -Bachelor’s or master’s degree in Electronics, Electrical Engineering, or a related discipline. -Ability to work effectively with global teams, with strong communication and presentation skills. Preferred Qualifications -Experience leading PHY integration into SoCs and working with post-silicon teams such as HSIO, ATE, SVE, and CE. -Good understanding of peripheral PHY protocols such as USB, UFS, and PCIe. -Experience with Shell, Perl, or Python scripting to automate circuit design and verification Keywords Analog Circuit Design, RX, TX, PLL, SerDes, VCO, High-Speed Transceiver, AFE, Equalizer, Sampler, Phase Interpolator, CTLE, PAM, Serializer, Deserializer, FinFET, Post-Silicon Bring-Up Applicants: Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. 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