ASIC Design Engineer - Performance Monitoring

NVIDIA System-On-Chip (SOC) group is hiring for an ASIC Design Engineer! The complexity of the chips we build has increased manifold over the years. We are now packing tens of billions of transistors in a chip to meet the growing computing demand. We are looking for a top ASIC Design Engineer to join our team. In this role, you should have real passion for RTL design implementation and methodologies that enable high quality system-level IP design.

What you'll be doing

• Be an integral part of the team defining and developing system-level RTL and methodologies to measure performance on the industry's leading GPUs/SOCs.
• Design and implement RTL features - work through the entire design cycle for SOC.
• Run and debug RTL checks to ensure design quality (e.g. CDC, RDC, Lint, Synthesis, Logic-Equivalence and more)
• Define, develop, and automate flows and methodologies to efficiently build and support a system-level IP
• Work with architects, designers, verification and SW engineers to accomplish your tasks.

What we need to see

• B.Tech or M.Tech in Electronics or Computer Engineering.
• 3+ years of relevant industry experience.
• Experienced in RTL design (Verilog), System-On-Chip design/implementation flows, and design automation.