Layout Design, Staff Engineer

We AreSynopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are You have spent years in the trenches of physical design, where a misplaced power ring or a routing bottleneck can turn a promising memory macro into a timing nightmare. Layout is not just drawing rectangles to you, it is solving a puzzle where every micron counts and every decision ripples through verification, performance, and yield. You know that the difference between a memory compiler that ships and one that gets stuck in debug is usually a floor plan decision made two weeks earlier, and you are the kind of engineer who sees that coming. You are comfortable moving between Calibre or ICV verification runs, XARA power analysis, and sitting with circuit designers to understand why a bitcell is behaving the way it is. When a DRC violation shows up at tape-out minus two days, you do not panic, you methodically trace it back, fix it, and document it so it does not happen again. You have strong opinions about power grid design and you can back them up with IR drop numbers. At Synopsys, you will work on memory IP that goes into chips powering everything from AI accelerators to automotive systems. The layouts you own will be used by customers worldwide, and the quality bar is exactly as high as you would expect. What You'll Be Doing