Senior Analog/Mixed-Signal Layout Engineer - SERDES

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MTS SILICON DESIGN ENGINEER THE ROLE: As a member of IO & PHY Group, you will help develop layout designs. As a member of the team, you will work closely with the architecture, IP design, Physical Design teams to achieve first pass silicon success.

THE PERSON: A successful candidate will work with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills.

KEY RESPONSIBLITIES

• Implementation Layout of blocks and macros

• Own and deliver the high-quality macros with help of team
• Mentor and groom the juniors in the team
• Work with contractor team and the planned work done as per aligned schedule
• Enable release flows as required

PREFERRED EXPERIENCE

• 8+ yrs of hands-on experience in layout design