Senior CAD Engineer - Floor Plan
- Location India, Bangalore
- Experience 4+ yrs
- Job type Full-time
- Posted 15 Oct 2026
- Qualification Master's (Engineering)
You will be taken to Intel’s own careers page to apply. Job ID JR0288128.
Job description
Job Details
Job Description: We are seeking a highly motivated Senior CAD Engineer for CPU IP Design Planning Methodology and Automation to support, maintain, enhance, and deploy Design Planning and RTL to Floorplan methodologies for next generation CPU IP development.
The successful candidate will work closely with CPU Physical Design, Architecture, RTL, and CAD teams to enable efficient and scalable Design Planning workflows. This role focuses on methodology development, flow support, automation, infrastructure maintenance, and productivity improvements across multiple CPU programs.
The ideal candidate combines a strong understanding of Physical Design and Design Planning concepts with expertise in CAD methodologies, EDA tools, scripting, and software development.
Key Responsibilities
-Own and support Design Planning and RTL to Floorplan methodology deployment across CPU IP programs.
-Develop, maintain, and enhance automation frameworks supporting RTL to Floorplan, Design Planning, physical aware RTL analysis, floorplan generation flows, PPA estimation methodologies, and early congestion and routability analysis.
