SPE Signal Integrity Engineer
- Location US-GA-Johns Creek | US-CA-San Jose | US-San Jose | IN-Bangalore | Seoul
- Experience 10+ yrs
- Job type Full-time
- Posted 12 Oct 2026
- Qualification PhD / Master's
You will be taken to Rambus’s own careers page to apply. Job ID 21307.
Job description
Overview
Rambus, a premier chip and silicon IP provider, is seeking to hire an exceptional Sr. Principal Engineer with signal integrity and package design experience to join our Memory Interface Chips BU’s engineering team in John's Creek, Georgia. Candidates will be joining some of the brightest inventors and engineers in the world to develop products that make data faster and safer.
As an SPE Signal Integrity Engineer, you will be reporting to the VP of Engineering and is a Full Time position. In this highly visible role, you will work within our SI/PI team to work on modeling, analysis, and simulations of signal integrity (SI) and power integrity (PI) in the very challenging DDR field with speed up to 12800+ MT/s.
Responsibilities
- Create SI/PI methodologies and work with the Design and SI teams to do SI/PI study and package design for the latest DDR product portfolio
- Work with our design team and validation team to define specifications and system design requirements such as packaging and PCB routings, IC-PKG-BRD decoupling requirements, channel simulations and jitter sensitivity analysis
