Physical Design Lead - CPU Team

Location Bangalore, India
Experience 7+ yrs
Job type Full-time
Posted 5 Oct 2026
Qualification Master's / Bachelor's

Apply on Official Website

You will be taken to AMD’s own careers page to apply. Job ID 89739.

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology can change lives for the better. It can heal us, entertain us, and make us more connected, productive, and understanding of the world around us. And we’re looking for talent who feel the same: people who want to leave the planet better than they found it, those who don’t shy away from humanity’s challenges but are determined to help solve them.

AMD is powering the next generation of supercomputing, high-performance computing, cloud, and AI. Whether you’re designing next-gen processors, enabling AI breakthroughs, or creating go-to-market plans, every role at AMD contributes to something bigger — technology that moves the world forward.

MTS Design Engineer THE ROLE: The position will involve working with a very experienced CPU physical design team. The person is responsible for delivering the physical design of critical CPU units to meet challenging goals for frequency, power, and other design requirements for AMD's next-generation processors in a fast-paced environment with cutting-edge technology.

THE PERSON: Engineer with a good attitude, strong analytical skills, effective communication, and excellent problem-solving abilities.

KEY RESPONSIBILITIES

Own critical CPU units and drive to convergence from RTL-to-GDSII - synthesis, floor-planning, place and route, timing closure, and signoff
Understand the micro-architecture to perform feasibility studies on performance, power, and area (PPA) tradeoffs for design closure.

Responsibilities

THE PERSON: Engineer with a good attitude, strong analytical skills, effective communication, and excellent problem-solving abilities.

KEY RESPONSIBILITIES

Own critical CPU units and drive to convergence from RTL-to-GDSII - synthesis, floor-planning, place and route, timing closure, and signoff
Understand the micro-architecture to perform feasibility studies on performance, power, and area (PPA) tradeoffs for design closure.
Develop and improve physical design methodologies and customize recipes across various implementation steps to optimize PPA.
Implement floor plan, synthesis, placement, CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), EM/IR and signoff.
Handling different PNR tools - Synopsys fusion compiler, Cadence, PrimeTime, StarRC, Calibre, Apache Redhawk

PREFERRED EXPERIENCE

7+ years of professional experience in physical design, preferably with high-performance designs.
Must have closed high-performance IPs- CPU/GPU/DPU/memory controller, etc.
Strong experience with tools for logic synthesis, place and route, timing analysis, and design checks for physical and electrical quality; familiarity with tools for schematics, layout, and circuit/logic simulation
Versatility with scripts to automate design flow - Perl/Tcl/Python
Strong communication skills, ability to multi-task across projects, and work with geographically spread out teams
Experience in advanced sub 7nm nodes
Excellent physical design and timing background.
A good understanding of computer architecture is preferred.
Strong analytical/problem-solving skills and pronounced attention to detail.

ACADEMIC CREDENTIALS:

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Qualification: Bachelors or Masters in Electronics/Electrical Engineering

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